#include <sys_config.h>
#include "../../chip/m36f/chip_m36f.h"
#include "../board_cfg.h"

#ifdef TVE_USE_FULL_CURRENT_MODE
#include "tve_hd_setting_full_mode.h"
#else
#include "tve_hd_setting_half_mode.h"
#endif
#if defined(DUAL_VIDEO_OUTPUT_USE_VCAP)
#include "tve_old_cfg_setting_m3606.h"
#endif

extern INT32 i2c_scb_write(UINT32 id, UINT8 slv_addr, UINT8 *data, int len);
extern INT32 i2c_scb_read(UINT32 id,UINT8 slv_addr, UINT8 *data, int len);
extern INT32 i2c_scb_write_read(UINT32 id, UINT8 slv_addr, UINT8 *data, int wlen, int rlen);
extern INT32 i2c_gpio_read(UINT32 id, UINT8 slv_addr, UINT8 *data, int len);
extern INT32 i2c_gpio_write(UINT32 id, UINT8 slv_addr, UINT8 *data, int len);
extern INT32 i2c_gpio_write_read(UINT32 id, UINT8 slv_addr, UINT8 *data, int wlen, int rlen);

BoardCfg board_config;

#define SYS_BOARD_IS_M3606_01V02

static const struct ir_key_map_t	g_itou_key_tab[] =
{
	// ali 60 key remote controller.
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df926d)}, V_KEY_0},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfc837)}, V_KEY_1},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df08f7)}, V_KEY_2},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df8877)}, V_KEY_3},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dff00f)}, V_KEY_4},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df30cf)}, V_KEY_5},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfb04f)}, V_KEY_6},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfd02f)}, V_KEY_7},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df10ef)}, V_KEY_8},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df906f)}, V_KEY_9},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df38c7)}, V_KEY_LEFT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df12ed)}, V_KEY_RIGHT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df22dd)}, V_KEY_UP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfb847)}, V_KEY_DOWN},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df50af)}, V_KEY_MP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df3ac5)}, V_KEY_ENTER},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfd22d)}, V_KEY_P_UP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfe01f)}, V_KEY_P_DOWN},
	//{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f28d7)}, V_KEY_BOOKMARK},
	//{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fa857)}, V_KEY_JUMPMARK},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df827d)}, V_KEY_TEXT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df708f)}, V_KEY_POWER},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df20df)}, V_KEY_PREV},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df0af5)}, V_KEY_NEXT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df629d)}, V_KEY_AUDIO},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df807f)}, V_KEY_SUBTITLE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df9867)}, V_KEY_SLEEP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfe21d)}, V_KEY_FIND},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfa05f)}, V_KEY_MUTE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df7a85)}, V_KEY_PAUSE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfa25d)}, V_KEY_VIDEO_FORMAT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df6897)}, V_KEY_INFOR},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df42bd)}, V_KEY_EXIT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df52ad)}, V_KEY_TVSAT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df02fd)}, V_KEY_TVRADIO},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfc23d)}, V_KEY_FAV},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfa857)}, V_KEY_RECORD},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df18e7)}, V_KEY_PLAY},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df58a7)}, V_KEY_FB},//red
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfd827)}, V_KEY_FF},//green
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df4ab5)}, V_KEY_B_SLOW},//yellow
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfaa55)}, V_KEY_SLOW},//blue
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfe817)}, V_KEY_STOP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df40bf)}, V_KEY_ZOOM},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df00ff)}, V_KEY_EPG},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df2ad5)}, V_KEY_MENU},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfc03f)}, V_KEY_RECALL},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df609f)}, V_KEY_RED},//red
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df7887)}, V_KEY_GREEN},//green
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dff807)}, V_KEY_YELLOW},//yellow
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfba45)}, V_KEY_BLUE},//blue

	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfca35)}, V_KEY_PVR_INFO},
#ifndef SUPPORT_CAS9
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfb24d)}, V_KEY_FILELIST},
#endif
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df8a75)}, V_KEY_DVRLIST},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df1ae5)}, V_KEY_USBREMOVE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df6a95)}, V_KEY_PIP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df9a65)}, V_KEY_PIP_LIST},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df5aa5)}, V_KEY_SWAP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfda25)}, V_KEY_MOVE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60dfea15)}, V_KEY_REPEATAB},

	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df28d7)}, V_KEY_F_UP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x60df48b7)}, V_KEY_F_DOWN},



	// ali 48 key remote controller.
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fb24d)}, V_KEY_0},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f22dd)}, V_KEY_1},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fa25d)}, V_KEY_2},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f629d)}, V_KEY_3},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fe21d)}, V_KEY_4},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f12ed)}, V_KEY_5},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f926d)}, V_KEY_6},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f52ad)}, V_KEY_7},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fd22d)}, V_KEY_8},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f32cd)}, V_KEY_9},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f9867)}, V_KEY_LEFT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f58a7)}, V_KEY_RIGHT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f18e7)}, V_KEY_UP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fd827)}, V_KEY_DOWN},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f906f)}, V_KEY_MP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807ff20d)}, V_KEY_ENTER},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f28d7)}, V_KEY_P_UP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fa857)}, V_KEY_P_DOWN},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f28d7)}, V_KEY_BOOKMARK},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fa857)}, V_KEY_JUMPMARK},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fc837)}, V_KEY_TEXT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fc03f)}, V_KEY_POWER},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f6897)}, V_KEY_PREV},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fe817)}, V_KEY_NEXT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f40bf)}, V_KEY_AUDIO},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fd02f)}, V_KEY_TIMER},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f50af)}, V_KEY_SUBTITLE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fb04f)}, V_KEY_LIST},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807ff00f)}, V_KEY_SLEEP},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f609f)}, V_KEY_FIND},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f30cf)}, V_KEY_MUTE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fb847)}, V_KEY_PAUSE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x00000156)}, V_KEY_SUBTITLE},
#ifdef HDTV_SUPPORT
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fa05f)}, V_KEY_VIDEO_FORMAT},
#else
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fa05f)}, V_KEY_HELP},
#endif
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f20df)}, V_KEY_INFOR},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f48b7)}, V_KEY_EXIT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f00ff)}, V_KEY_TVSAT},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f807f)}, V_KEY_TVRADIO},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f10ef)}, V_KEY_FAV},
#ifdef DVR_PVR_SUPPORT
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f38c7)}, V_KEY_RECORD},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f7887)}, V_KEY_PLAY},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f02fd)}, V_KEY_FB},//red
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f827d)}, V_KEY_FF},//green
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f42bd)}, V_KEY_B_SLOW},//yellow
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fc23d)}, V_KEY_SLOW},//blue
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807ff807)}, V_KEY_STOP},
#endif
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fe01f)}, V_KEY_LANGUAGE},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f708f)}, V_KEY_ZOOM},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f08f7)}, V_KEY_EPG},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f8877)}, V_KEY_MENU},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f728d)}, V_KEY_RECALL},
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f02fd)}, V_KEY_RED},//red
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f827d)}, V_KEY_GREEN},//green
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807f42bd)}, V_KEY_YELLOW},//yellow
	{{PAN_KEY_TYPE_REMOTE, PAN_KEY_PRESSED, 0, SET_IRCODE(0x807fc23d)}, V_KEY_BLUE},//blue

	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF0044)}, V_KEY_POWER },
	//{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF0056)}, V_KEY_ENTER },
	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF0074)}, V_KEY_VIDEO_FORMAT},
	//{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF006e)}, V_KEY_MENU },
	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF0064)}, V_KEY_LEFT },
	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF0054)}, V_KEY_UP },
	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF005c)}, V_KEY_DOWN },
	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF006c)}, V_KEY_RIGHT },
	{{PAN_KEY_TYPE_PANEL, PAN_KEY_PRESSED, 0, SET_IRCODE(0xFFFF004c)}, V_KEY_TVRADIO},
};

IR_Key_Map_t ir_key_maps[] =
{
    {ROCK00,IRP_NEC,0x807f},
};



static struct pan_hw_info pan_hw_info =
{
	0,				/* type_kb : 2; Key board (array) type */
	1,				/* type_scan : 1; 0: Slot scan, 1: Shadow scan */
	1,				/* type_key: 1; Key exit or not */
	1,				/* type_irp: 3; 0: not IRP, 1: NEC, 2: LAB */
	0,				/* type_mcu: 1; MCU exit or not */
	4,				/* num_com: 4; Number of com PIN, 0 to 8 */
	1,				/* Position of colon flag, 0 to 7 */
	1,				/* num_scan: 2; Number of scan PIN, 0 to 2 */
	0,				/* rsvd_bits:6; Reserved bits */
	0,              /* rsvd byte for align pan_info */
	{0, HAL_GPIO_O_DIR, 127},		/* LATCH PIN */
	{0, HAL_GPIO_O_DIR, 	127},		/* CLOCK PIN */
	{1, HAL_GPIO_O_DIR, 	127},		/* DATA PIN */
	{{0, HAL_GPIO_I_DIR, 	127},		/* SCAN1 PIN */
	{0, HAL_GPIO_I_DIR, 127}},		/* SCAN2 PIN */
	{{0, HAL_GPIO_O_DIR, 	127},		/* COM1 PIN */
	{0, HAL_GPIO_O_DIR, 	127},		/* COM2 PIN */
	{0, HAL_GPIO_O_DIR, 	127},		/* COM3 PIN */
	{0, HAL_GPIO_O_DIR, 	127},		/* COM4 PIN */
	{0, HAL_GPIO_O_DIR, 127},		/* COM5 PIN */
	{0, HAL_GPIO_O_DIR, 127},		/* COM6 PIN */
	{0, HAL_GPIO_O_DIR, 127},		/* COM7 PIN */
	{0, HAL_GPIO_O_DIR, 127}},		/* COM8 PIN */
	{{0, HAL_GPIO_O_DIR, 	127},		/* POWER PIN */
	{1, HAL_GPIO_O_DIR, 	127},		/* LOCK PIN */
	{0, HAL_GPIO_O_DIR, 127},		/* Extend function LBD */
	{0, HAL_GPIO_O_DIR, 127}},		/* Extend function LBD */
    {0, HAL_GPIO_O_DIR, 127},       /* rsvd extend function LBD */        
	300,							/* Intv repeat first */
	250,							/* Intv repeat */
	350,							    /* Intv release, 0: disable release key */
	NULL,	 	 	 	 	 	 	/* hook_scan() callback */
	NULL,	 	 	 	 	 	 	/* hook_show() callback */
	0,	 	 	 	 	 	 	/* p_seg */
};
#define bitmap_list				NULL
#define bitmap_list_num		0
struct pan_configuration pan_config = {&pan_hw_info, bitmap_list_num, bitmap_list};


static PinMuxInfo pin_mux_array[] = 
{
  #if defined(I2C_SCB0_RUN_WITH_GPIO_I2C_MODE)
    {I2C_SEL,               0},
  #else
    {I2C_SEL,               1},
  #endif
    
    {I2C2_SEL3,             1},
    {CI_SEL,                1},
    {CI_ADDR_SEL,           1},
//    {ASSI_SEL,              1},
//    {ASSI2_SEL,             1},

    {I2SO_8_CHANNELS_SEL,   1},  // shi  for 3606


    {CI_CTRL_PIN_SEL,       1},
#ifdef CEC_SUPPORT
    {HDMI_CEC_SEL2,         1},
#endif                
#ifdef SDIO_SUPPORT    
    {SDIO_SEL,              1},      // enable SDIO
#endif        
#ifdef DUAL_ENABLE2
    {UART2_TX_SEL,          1},
#endif
 {SMCARD2_SEL,         1},
};

static GpioInfo gpio_array[] = 
{
    {1, HAL_GPIO_O_DIR, SYS_I2C_SDA},        //SYS_I2C_SDA
    {1, HAL_GPIO_O_DIR, SYS_I2C_SCL},        //SYS_I2C_SCL
    
    {1, HAL_GPIO_O_DIR, SYS_I2C_SDA2},
    {1, HAL_GPIO_O_DIR, SYS_I2C_SCL2},
        
    {0, HAL_GPIO_O_DIR, 12},        //power               
    {0, HAL_GPIO_O_DIR, (96+6)},

#ifdef SDIO_SUPPORT
    {1, HAL_GPIO_O_DIR, (96+4)}, //SDIO_GPIO_DETECT
    {1, HAL_GPIO_O_DIR, (96+5)}, //SDIO_GPIO_LOCK
    {1, HAL_GPIO_O_DIR, 127}, //SDIO_GPIO_CS  not used for 3606
#endif                                   
#ifdef DUAL_ENABLE2
    {1, HAL_GPIO_O_DIR, 14},
#endif
};


#define GPIO_I2C0_SDA_INDEX         0
#define GPIO_I2C0_SCL_INDEX         1
#define GPIO_I2C0_SDA2_INDEX        2
#define GPIO_I2C0_SCL2_INDEX        3
#ifdef SYS_BOARD_IS_M3606_01V02  
#define SYS_POWER_INDEX             4
#define SYS_MUTE_INDEX              5
#else
#define SYS_POWER_INDEX             5
#define SYS_MUTE_INDEX              4
#endif

#ifdef SDIO_SUPPORT
#define SDIO_GPIO_DETECT_INDEX      6
#define SDIO_GPIO_LOCK_INDEX        7
#define SDIO_GPIO_CS_INDEX          8
#endif

#define MEM_GPIO_ENABLED    1

FrontEndCfg front_end[2];

UINT32 get_support_2tuner_type(void);
void board_nim_config(BoardCfg *cfg,UINT32 nim_flag);
#ifdef DVBS_SUPPORT

extern INT32 nim_s3501_attach(struct QPSK_TUNER_CONFIG_API *ptrQPSK_Tuner);
FrontEndCfg* front_end_s_cfg(UINT8 tuner_id)
{
    static INT32 nim_count = 0;
    struct QPSK_TUNER_CONFIG_API* qpsk_tuner;
    FrontEndCfg* cfg;
    if(tuner_id > 1)
        return NULL;
    cfg = &front_end[tuner_id];
    MEMSET(cfg, 0, sizeof(FrontEndCfg));
    cfg->front_end_type = FRONTEND_TYPE_S;
    cfg->sat_id = 2;
    cfg->lnb_power = NULL;
    cfg->lnb_short_det = NULL;
    cfg->nim_reset = NULL;
    if(nim_count == 0)
        cfg->nim_name = "NIM_S3501_0";
    else
        cfg->nim_name = "NIM_S3501_1";
    
    nim_count++;
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_id = TSI_SSI2B_1;
    else
        cfg->tsi_cfg.tsi_id = TSI_SSI2B_0;
    
    cfg->tsi_cfg.tsi_attr = 0x9b;
    if(tuner_id == 0)
    {
        cfg->tsi_cfg.tsi_select = TSI_TS_A;     
    }
    else
    {
        cfg->tsi_cfg.tsi_select = TSI_TS_B;        
    }

    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;
    cfg->nim_config.s_cfg.tsi_id_m3501a = TSI_SSI_0;
    cfg->nim_config.s_cfg.tsi_attr_m3501a = 0x8b;

    cfg->nim_config.s_cfg.attach = nim_s3501_attach;
    qpsk_tuner = &cfg->nim_config.s_cfg.qpsk_tuner;

	qpsk_tuner->nim_Tuner_Init = nim_vz7306_init;//nim_hz6306_init;
	qpsk_tuner->nim_Tuner_Control = nim_vz7306_control;//nim_hz6306_control;
	qpsk_tuner->nim_Tuner_Status	= nim_vz7306_status;//nim_hz6306_status;
	qpsk_tuner->config_data.Recv_Freq_Low = 900;
	qpsk_tuner->config_data.Recv_Freq_High = 2200;    

	qpsk_tuner->tuner_config.i2c_type_id = I2C_FOR_S3501;   //I2C_TYPE_SCB0
	qpsk_tuner->tuner_config.cTuner_Base_Addr = 0xc0;      //SYS_TUN_BASE_ADDR;
	qpsk_tuner->ext_dm_config.i2c_type_id = I2C_FOR_S3501;  //I2C_TYPE_SCB0, 3501 i2c type id
	if(tuner_id == 0)
	    qpsk_tuner->ext_dm_config.i2c_base_addr = 0x66;	    // 3501 i2c base address
	else    
	    qpsk_tuner->ext_dm_config.i2c_base_addr = 0xe6;

    qpsk_tuner->config_data.QPSK_Config=0x69;//bit2 IQ Normal //0xed;//bit2 IQSWAP  //shi for 3606


    return cfg;
}
#endif

#ifdef ISDBT_SUPPORT

#if(SYS_ISDBT_DEMO_MODULE == TC90517)
extern INT32 f_TC90517_attach(struct COFDM_TUNER_CONFIG_API *ptrCOFDM_Tuner);

FrontEndCfg* front_end_isdbt_cfg(UINT8 tuner_id)
{
    static INT32 nim_count = 0;
    struct COFDM_TUNER_CONFIG_API*  isdbt_tuner;
    FrontEndCfg* cfg;
    if(tuner_id > 1)
        return NULL;

    cfg = &front_end[tuner_id];
    MEMSET(cfg, 0, sizeof(FrontEndCfg));
    cfg->front_end_type = FRONTEND_TYPE_T;
    cfg->sat_id = 1;
    cfg->lnb_power = NULL;
    cfg->lnb_short_det = NULL;
    cfg->nim_reset = NULL;
    if(nim_count == 0)
        cfg->nim_name = "NIM_TC90517_0";
    else
        cfg->nim_name = "NIM_TC90517_1";
    
    nim_count++;
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_id = TSI_SSI_0;
    else
        cfg->tsi_cfg.tsi_id = TSI_SSI_1;
    
    cfg->tsi_cfg.tsi_attr = 0x87;
    if(tuner_id == 0)
       cfg->tsi_cfg.tsi_select = TSI_TS_A;
    else
       cfg->tsi_cfg.tsi_select = TSI_TS_B;
    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;
    cfg->nim_config.t_cfg.attach = f_TC90517_attach;
    isdbt_tuner = &cfg->nim_config.t_cfg.cofdm_tuner;
    isdbt_tuner->ext_dm_config.i2c_type_id = I2C_FOR_TUNER;//I2C_TYPE_SCB0;
    if(tuner_id == 0)
        isdbt_tuner->ext_dm_config.i2c_base_addr = 0xC0;
    else
        isdbt_tuner->ext_dm_config.i2c_base_addr = 0xC6;
    
    isdbt_tuner->tuner_config.i2c_type_id = I2C_FOR_TUNER;//I2C_TYPE_SCB0;
    isdbt_tuner->tuner_config.cTuner_Base_Addr = 0xC0;

    isdbt_tuner->nim_Tuner_Init = tun_tda18212_init;
    isdbt_tuner->nim_Tuner_Control = tun_tda18212_control;
    isdbt_tuner->nim_Tuner_Status = tun_tda18212_status;
    isdbt_tuner->tuner_config.cTuner_Crystal = 16000;    //khz
    isdbt_tuner->tuner_config.cTuner_Ref_DivRatio = 128;
    isdbt_tuner->tuner_config.wTuner_IF_Freq = 4000;
    isdbt_tuner->tuner_config.cTuner_AGC_TOP = 2;// from 0~7 //can be setted by COFDM, ex.disable RF Auto-AGC
    isdbt_tuner->tuner_config.cTuner_Step_Freq = 125;
    isdbt_tuner->tuner_config.cChip = Tuner_Chip_QUANTEK;
    isdbt_tuner->tuner_config.Tuner_Write = i2c_scb_write; //can be setted by COFDM
    isdbt_tuner->tuner_config.Tuner_Read = i2c_scb_read;   //can be setted by COFDM
    isdbt_tuner->tuner_config.Tuner_Write_Read = i2c_scb_write_read;

    // Work around to Enable SSI1_2 data swap
    //*((volatile UINT8 *)(0xb801a00b)) = (*(volatile UINT8  *)(0xb801a00b)) | 0x10;   
    return cfg;
}
#else
extern INT32 f_dib8000_attach(struct COFDM_TUNER_CONFIG_API *ptrCOFDM_Tuner);

FrontEndCfg* front_end_isdbt_cfg(UINT8 tuner_id)
{
    static INT32 nim_count = 0;
    struct COFDM_TUNER_CONFIG_API*  isdbt_tuner;
    FrontEndCfg* cfg;
    if(tuner_id > 1)
        return NULL;

    cfg = &front_end[tuner_id];
    MEMSET(cfg, 0, sizeof(FrontEndCfg));
    cfg->front_end_type = FRONTEND_TYPE_T;    
    cfg->sat_id = 1;
    cfg->lnb_power = NULL;
    cfg->lnb_short_det = NULL;
    cfg->nim_reset = NULL;
    if(nim_count == 0)
        cfg->nim_name = "NIM_DIB8000_0";
    else
        cfg->nim_name = "NIM_DIB8000_1";
    nim_count++;
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_id = TSI_SSI_0;
    else
        cfg->tsi_cfg.tsi_id = TSI_SSI_1;

    cfg->tsi_cfg.tsi_attr = 0x87;
    if(tuner_id == 0)
       cfg->tsi_cfg.tsi_select = TSI_TS_A;
    else
       cfg->tsi_cfg.tsi_select = TSI_TS_B;
    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;
    cfg->nim_config.t_cfg.attach = f_dib8000_attach;
    isdbt_tuner = &cfg->nim_config.t_cfg.cofdm_tuner;
    isdbt_tuner->ext_dm_config.i2c_type_id = I2C_FOR_TUNER;//I2C_TYPE_SCB0;
    isdbt_tuner->ext_dm_config.i2c_base_addr = 0;//0xC0;
    isdbt_tuner->tuner_config.i2c_type_id = I2C_FOR_TUNER;//I2C_TYPE_SCB0;
    isdbt_tuner->tuner_config.cTuner_Base_Addr = 0;
    // Work around to Enable SSI1_2 data swap
    //*((volatile UINT8 *)(0xb801a00b)) = (*(volatile UINT8  *)(0xb801a00b)) | 0x10;   
    cfg->is_isdbt = 1;
    return cfg;
}
#endif
#endif

#if defined(DVBT2_SUPPORT)
extern INT32 nim_sharp6158_attach(char *name, PCOFDM_TUNER_CONFIG_API pConfig);
FrontEndCfg* front_end_t_cfg(UINT8 tuner_id)
{
     unsigned long data;
     struct COFDM_TUNER_CONFIG_API*  t_tuner;
     FrontEndCfg* cfg;
     if(tuner_id > 1)
         return NULL;
     
     cfg = &front_end[tuner_id];
     MEMSET(cfg, 0, sizeof(FrontEndCfg));
     cfg->front_end_type = FRONTEND_TYPE_T;    
     cfg->is_isdbt = 0;
     cfg->sat_id = 1;
     cfg->lnb_power = NULL;
     cfg->lnb_short_det = NULL;
     cfg->nim_reset = NULL;
    ////////////////////////////////////////////////////////////
    //kent.kang,this code for full nim of 3606-01V03(mn88472+mxl603)
    //     2013-6-28
    //cfg->tsi_cfg.tsi_id = TSI_SSI_1;    
    //cfg->tsi_cfg.tsi_select = TSI_TS_A;
    //cfg->tsi_cfg.tsi_attr = 0x83;   
    //cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;
    //
    //t_tuner->config_data.Connection_config = 0x00;     //no I/Q swap.
    //t_tuner->config_data.Cofdm_Config = 0x03;          //low-if, dirct , if-enable.
    //t_tuner->config_data.AGC_REF = 0x63;
    //t_tuner->config_data.IF_AGC_MAX = 0xff;
    //t_tuner->config_data.IF_AGC_MIN = 0x00;
    //
    //t_tuner->nim_Tuner_Init     =  tun_mxl603_init;
    //t_tuner->nim_Tuner_Control  =  tun_mxl603_control;
    //t_tuner->nim_Tuner_Status   =  tun_mxl603_status;
    //t_tuner->nim_Tuner_Command  =  tun_mxl603_command;
    //
    //t_tuner->tuner_config.cTuner_Crystal      = 16;     // Unit: MHz
    //t_tuner->tuner_config.wTuner_IF_Freq      = 5000;   //4570,36170
    //t_tuner->tuner_config.cTuner_AGC_TOP      = 252;    //Special for MaxLiner
    //t_tuner->tuner_config.cChip               = Tuner_Chip_MAXLINEAR;
    //
    //t_tuner->tuner_config.i2c_type_id =I2C_TYPE_SCB0;   //I2C_TYPE_SCB0;
    //t_tuner->tuner_config.cTuner_Base_Addr    = 0xC0;   //0xC0;
    //t_tuner->tuner_type = MXL603;
    //
    ////////////////////////////////////////////////////////////
    if(tuner_id == 0)
    { //DVB-S is using TSI_SSI_0.
        cfg->tsi_cfg.tsi_id = TSI_SSI_0;
        cfg->tsi_cfg.tsi_select = TSI_TS_A;
    }
    else
    { //Nim slots are using TSI_SSI_1.
        cfg->tsi_cfg.tsi_id = TSI_SSI_1;    
        cfg->tsi_cfg.tsi_select = TSI_TS_B;
    }
      
    cfg->tsi_cfg.tsi_attr = 0x87;
    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;

    t_tuner = &cfg->nim_config.t_cfg.cofdm_tuner;
    t_tuner->ts_mode = NIM_COFDM_TS_SSI;    

#if (SYS_DVBT_DEMO_MODULE == MN88472 || SYS_DVBT_DEMO_MODULE == SHARP6158)
//    data = *((volatile unsigned long *)0xb8000088);
//    data &= (~0x01000000); //set bit24 = 0 for disable I2C0, and enable GPIO[23:22].
//    *((volatile unsigned long *)0xb8000088) = data;

    t_tuner->config_data.flag = 1; //0:ISDBT mode, 1:DVBT mode.
    
    if(1)//tuner_id == 0
    {
        cfg->nim_name = "NIM_MN88472_0";
        t_tuner->ext_dm_config.i2c_type_id = I2C_FOR_TUNER;
        t_tuner->ext_dm_config.i2c_base_addr = 0x38; //(0x1c<<1)
    }
    else
    {
//        cfg->nim_name = "NIM_MN88472_1";
//        t_tuner->ext_dm_config.i2c_type_id = I2C_TYPE_GPIO0;
//        t_tuner->ext_dm_config.i2c_base_addr = 0x38;
    }

    cfg->nim_config.t_cfg.attach_with_name = nim_sharp6158_attach;

#else
    #error "SYS_DVBT_DEMO_MODULE had not been defined for DVB-T2."
#endif



#if (SYS_TUN_MODULE == MXL301 || SYS_DVBT_DEMO_MODULE == SHARP6158)
    //unuseful.
    t_tuner->config_data.Connection_config = 0x00;  //no I/Q swap.
    t_tuner->config_data.Cofdm_Config = 0x03;        //low-if, dirct , if-enable.
    t_tuner->config_data.AGC_REF = 0x63;
    t_tuner->config_data.IF_AGC_MAX = 0xff;
    t_tuner->config_data.IF_AGC_MIN = 0x00;
    t_tuner->tuner_config.cTuner_AGC_TOP      = 252;
    t_tuner->tuner_config.cChip               = Tuner_Chip_MAXLINEAR;

    t_tuner->nim_Tuner_Init     =  tun_mxl301_init;
    t_tuner->nim_Tuner_Control  =  tun_mxl301_control;
    t_tuner->nim_Tuner_Status   =  tun_mxl301_status;
    t_tuner->nim_Tuner_Command  =  tun_mxl301_command;

    t_tuner->tuner_config.cTuner_Crystal      = 24000; //kHz, MxL_XTAL_24_MHZ/1000
    t_tuner->tuner_config.wTuner_IF_Freq      = 5000; //kHz, MxL_IF_5_MHZ/1000

    t_tuner->tuner_config.cTuner_Base_Addr    =  0xC2;//MxL_I2C_ADDR_97. It's fixed in SHARP6158 full nim.
    t_tuner->tuner_type = MXL301;

#else
    #error "SYS_TUN_MODULE had not been defined for DVB-T2."
#endif

    t_tuner->tuner_config.i2c_type_id = I2C_FOR_TUNER;
    if((t_tuner->tuner_config.i2c_type_id & I2C_TYPE_MASK) == I2C_TYPE_GPIO)
    {
        t_tuner->tuner_config.Tuner_Write = i2c_gpio_write;
        t_tuner->tuner_config.Tuner_Read = i2c_gpio_read;
        t_tuner->tuner_config.Tuner_Write_Read = i2c_gpio_write_read;
    }
    else
    {
        t_tuner->tuner_config.Tuner_Write = i2c_scb_write;
        t_tuner->tuner_config.Tuner_Read = i2c_scb_read;
        t_tuner->tuner_config.Tuner_Write_Read = i2c_scb_write_read;
    }

    return cfg;
}


#elif  defined(DVBT_SUPPORT)

#if (SYS_DVBT_DEMO_MODULE == MXL101)
extern INT32 f_MXL101_attach(char *name,struct COFDM_TUNER_CONFIG_API *ptrCOFDM_Tuner);
FrontEndCfg* front_end_t_cfg(UINT8 tuner_id)
{
    static INT32 nim_count = 0;
    struct COFDM_TUNER_CONFIG_API*  t_tuner;
    FrontEndCfg* cfg;
    if(tuner_id > 1)
     return NULL;

    cfg = &front_end[tuner_id];
    MEMSET(cfg, 0, sizeof(FrontEndCfg));
    cfg->front_end_type = FRONTEND_TYPE_T;    
    cfg->sat_id = 1;
    cfg->lnb_power = NULL;
    cfg->lnb_short_det = NULL;
    cfg->nim_reset = NULL;
    //if(tuner_id == 0)
    if(nim_count == 0)
        cfg->nim_name = "NIM_MXL101_0";
    else
        cfg->nim_name = "NIM_MXL101_1";
    
    nim_count++;
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_id = TSI_SSI_0;
    else
        cfg->tsi_cfg.tsi_id = TSI_SSI_1;
    
    cfg->tsi_cfg.tsi_attr = 0x87;
    if(tuner_id == 0)
       cfg->tsi_cfg.tsi_select = TSI_TS_A;
    else
       cfg->tsi_cfg.tsi_select = TSI_TS_B;
    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;   
    cfg->nim_config.t_cfg.attach_with_name = f_MXL101_attach;
    t_tuner = &cfg->nim_config.t_cfg.cofdm_tuner;
    
    t_tuner->ext_dm_config.i2c_type_id = I2C_FOR_TUNER; //I2C_TYPE_SCB0
    if(tuner_id == 0)
        t_tuner->ext_dm_config.i2c_base_addr = 0xC0;
    else    
        t_tuner->ext_dm_config.i2c_base_addr = 0xC6;
    
    t_tuner->ext_dm_config.lock_polar_reverse = 1;
    t_tuner->ts_mode = NIM_COFDM_TS_SSI;    
    t_tuner->config_mode = 1;
    cfg->is_isdbt = 0;
    return cfg;
}

#elif (SYS_DVBT_DEMO_MODULE == COFDM_M3101)
#define M3100_REV_ID        4
extern INT32 nim_m3101_dev_attach_ext(char *name, PCOFDM_TUNER_CONFIG_API pConfig);
FrontEndCfg* front_end_t_cfg(UINT8 tuner_id)
{
    static INT32 nim_count = 0;   
    struct COFDM_TUNER_CONFIG_API*  t_tuner;
    FrontEndCfg* cfg;
    if(tuner_id > 1)
    return NULL;

    cfg = &front_end[tuner_id];
    MEMSET(cfg, 0, sizeof(FrontEndCfg));
    cfg->front_end_type = FRONTEND_TYPE_T;    
    cfg->sat_id = 1;
    cfg->lnb_power = NULL;
    cfg->lnb_short_det = NULL;
    cfg->nim_reset = NULL;

    if(nim_count == 0)
        cfg->nim_name = "NIM_COFDM_0";
    else
        cfg->nim_name = "NIM_COFDM_1";
    
    nim_count++;
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_id = TSI_SSI_0;
    else
        cfg->tsi_cfg.tsi_id = TSI_SSI_1;    
    cfg->tsi_cfg.tsi_attr = 0x83;
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_select = TSI_TS_A;
    else
        cfg->tsi_cfg.tsi_select = TSI_TS_B;
    
    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;   
    cfg->nim_config.t_cfg.attach_with_name = nim_m3101_dev_attach_ext;
    t_tuner = &cfg->nim_config.t_cfg.cofdm_tuner;

    t_tuner->config_data.Connection_config = 0x00; //no I/Q swap.
    t_tuner->config_data.Cofdm_Config = 0x03;//low-if, dirct , if-enable.
    t_tuner->config_data.AGC_REF = 0x53;
    t_tuner->config_data.IF_AGC_MAX = 0xff;
    t_tuner->config_data.IF_AGC_MIN = 0x00;

    t_tuner->nim_Tuner_Init = tun_mxl5005_init;
    t_tuner->nim_Tuner_Control = tun_mxl5005_control;
    t_tuner->nim_Tuner_Status =  tun_mxl5005_status;
    t_tuner->tuner_config.cTuner_Crystal = 16; // Unit: MHz
    t_tuner->tuner_config.wTuner_IF_Freq = 4570; //36170
    t_tuner->tuner_config.cTuner_AGC_TOP = 252; //Special for MaxLiner
    t_tuner->tuner_config.cChip = Tuner_Chip_MAXLINEAR; //Tuner_Chip_PHILIPS
    t_tuner->tuner_config.Tuner_Write = i2c_scb_write;
    t_tuner->tuner_config.Tuner_Read = i2c_scb_read;

    t_tuner->tuner_config.i2c_type_id = I2C_FOR_TUNER;  //I2C_TYPE_SCB0
    t_tuner->tuner_config.cTuner_Base_Addr = 0xc6;
    t_tuner->ext_dm_config.i2c_type_id = I2C_FOR_TUNER; //I2C_TYPE_SCB0
    if(tuner_id == 0)
        t_tuner->ext_dm_config.i2c_base_addr = 0x40;
    else
        t_tuner->ext_dm_config.i2c_base_addr = 0x42;

    t_tuner->ts_mode = NIM_COFDM_TS_SSI;    
    t_tuner->tuner_type = MXL5005;
    t_tuner->rev_id = M3100_REV_ID; // cofdm mode can't read ver id from register
    t_tuner->config_mode = 1;
    t_tuner->work_mode = NIM_COFDM_ONLY_MODE;
    cfg->is_isdbt = 0;
    return cfg;
}

#else
    #error "SYS_DVBT_DEMO_MODULE had not been defined for DVBT."
#endif

#endif

//add on 2011-11-04
#ifdef DVBC_SUPPORT

#if 0
static void config_tsi_pin(UINT32 tsi_id, BOOL clear)
{
    static UINT32 config_array[][2] = 
    {
        {TSI_SPI_0, 0x08}, {TSI_SPI_1, 0x04}, 
        {TSI_SSI_0, 0x10}, {TSI_SSI_1, 0x20}, {TSI_SSI_2, 0x40}, {TSI_SSI_3, 0x80}, 
        {TSI_SSI2B_0, 0x01}, {TSI_SSI2B_1, 0x02}, {TSI_SSI4B_0, 0x01}, {TSI_SSI4B_1, 0x02}, 
    };

    UINT32 i;
    UINT32 data = *((volatile unsigned long *)0xb800008c);

    if(clear)
        data &= 0xffffff00;
    for(i=0; i<ARRAY_SIZE(config_array); i++)
    {
        if(tsi_id == config_array[i][0])
        {
            data |= config_array[i][1];
            *((volatile unsigned long *)0xb800008c) = data;
            break;
        }
    }
}
#endif

extern INT32 nim_s3202_attach(struct QAM_TUNER_CONFIG_API * ptrQAM_Tuner);
extern INT32 nim_mxl241_attach(struct QAM_TUNER_CONFIG_API * ptrQAM_Tuner);
FrontEndCfg* front_end_c_cfg(UINT8 tuner_id)
{
    static INT32 nim_count = 0;
    struct QAM_TUNER_CONFIG_API*  c_tuner;
    UINT8 bI2cType = I2C_FOR_TUNER; //I2C_TYPE_SCB0
    FrontEndCfg* cfg;
    if(tuner_id > 1)
     return NULL;

    cfg = &front_end[tuner_id];
    MEMSET(cfg, 0, sizeof(FrontEndCfg));
    cfg->front_end_type = FRONTEND_TYPE_C;    
    cfg->sat_id = 1;
    cfg->lnb_power = NULL;
    cfg->lnb_short_det = NULL;
    cfg->nim_reset = NULL;
    cfg->is_isdbt = 0;
    
    if(tuner_id == 0)
        cfg->nim_name = "NIM_S3202_0";
    else
        cfg->nim_name = "NIM_S3202_1";

    //config_tsi_pin(TSI_SSI_1, TRUE);
    
    nim_count++;
    //change on 2011-11-08 M3606 must be TSI_SSI_1
#if 0
    if(tuner_id == 0)
        cfg->tsi_cfg.tsi_id = TSI_SSI_0;
    else
#endif        
        cfg->tsi_cfg.tsi_id = TSI_SSI_1;
    
    cfg->tsi_cfg.tsi_attr = 0x87;
    
    if(tuner_id == 0)
       cfg->tsi_cfg.tsi_select = TSI_TS_A;
    else
       cfg->tsi_cfg.tsi_select = TSI_TS_B;
    
    cfg->tsi_cfg.tsi_spi_tsg_attr = 0x83;
	
#ifdef SYS_DEM_MXL241SF_USAGE
    	cfg->tsi_cfg.tsi_attr &=0xFB;
    	cfg->nim_config.c_cfg.attach = nim_mxl241_attach;
    	c_tuner = &cfg->nim_config.c_cfg.qam_tuner;
	c_tuner->tuner_config_ext.cTuner_special_config = 0x01; 
	c_tuner->nim_Tuner_Init = NULL;		
	c_tuner->nim_Tuner_Control = NULL;		
	c_tuner->nim_Tuner_Status = NULL;
#else

    cfg->nim_config.c_cfg.attach = nim_s3202_attach;
    c_tuner = &cfg->nim_config.c_cfg.qam_tuner;

#if (SYS_DEM_M3200C_USAGE  == SYS_FUNC_ON )

    c_tuner->tuner_config_data.cTuner_Tsi_Setting = NIM_0_SSI_0;
    //config for tuner DCT70707
	c_tuner->tuner_config_data.RF_AGC_MAX = 0xBA;		
	c_tuner->tuner_config_data.RF_AGC_MIN = 0x2A;		
	c_tuner->tuner_config_data.IF_AGC_MAX = 0xFE;		
	c_tuner->tuner_config_data.IF_AGC_MIN = 0x01;		
	c_tuner->tuner_config_data.AGC_REF 			= 0x80;			
	c_tuner->tuner_config_ext.cTuner_special_config = 0x01; 
	// RF AGC is disabled		
	c_tuner->tuner_config_ext.cChip				= Tuner_Chip_NXP;		
	c_tuner->tuner_config_ext.cTuner_AGC_TOP	= 1;//7; /*1 for single AGC, 7 for dual AGC */		
	c_tuner->tuner_config_ext.cTuner_Base_Addr	= 0xc2;		
	c_tuner->tuner_config_ext.cTuner_Crystal		= 4;		
	c_tuner->tuner_config_ext.cTuner_Ref_DivRatio	= 64; 		
	c_tuner->tuner_config_ext.cTuner_Step_Freq	= 62.5;		
	//(Ref_divRatio*Step_Freq)=(80*50)=(64*62.5)=(24*166.7)		
	c_tuner->tuner_config_ext.wTuner_IF_Freq		= 36000; //5070; //4063; //5070;//36000;		
	//ptrQAM_Tuner->tuner_config_ext.cTuner_Charge_Pump= 0;  		
	//c_tuner->tuner_config_ext.i2c_type_id 			= I2C_TYPE_SCB1;//I2C_TYPE_SCB0;	
	extern INT32 tun_dct70701_init(UINT32 * ptrTun_id, struct QAM_TUNER_CONFIG_EXT * ptrTuner_Config);
	extern INT32 tun_dct70701_control(UINT32 Tun_id, UINT32 freq, UINT32 sym, UINT8 AGC_Time_Const, UINT8 _i2c_cmd);
	extern INT32 tun_dct70701_status(UINT32 Tun_id, UINT8 *lock);
	c_tuner->nim_Tuner_Init = tun_dct70701_init;		
	c_tuner->nim_Tuner_Control = tun_dct70701_control;		
	c_tuner->nim_Tuner_Status = tun_dct70701_status;
	c_tuner->tuner_config_ext.i2c_type_id = bI2cType;
    //config end	
#else
    

    /*config tuner S3202 START ************************************************************************/

    c_tuner->tuner_config_data.cTuner_Tsi_Setting = NIM_0_SSI_0;
    c_tuner->tuner_config_data.RF_AGC_MAX = 0xBA;
    c_tuner->tuner_config_data.RF_AGC_MIN = 0x2A;
    c_tuner->tuner_config_data.IF_AGC_MAX = 0xFF;
    c_tuner->tuner_config_data.IF_AGC_MIN = 0x00;
    //trueve 20081224, update according to Program guide 20081223 by Joey.	
    c_tuner->tuner_config_data.AGC_REF = 0x80;

    c_tuner->tuner_config_ext.cTuner_special_config = 0x01; // RF AGC is disabled
    c_tuner->tuner_config_ext.cChip = Tuner_Chip_ALPS;
    c_tuner->tuner_config_ext.cTuner_AGC_TOP	= 3;
    c_tuner->tuner_config_ext.cTuner_Base_Addr = 0xC2; // C0, C2, C4,C6
    c_tuner->tuner_config_ext.cTuner_Crystal = 4;
    c_tuner->tuner_config_ext.cTuner_Ref_DivRatio = 64;
    c_tuner->tuner_config_ext.cTuner_Step_Freq = 62.5;
    //(Ref_divRatio*Step_Freq)=(80*50)=(64*62.5)=(24*166.7)=(31.25*128)
    c_tuner->tuner_config_ext.wTuner_IF_Freq = 36125;
    //ptrQAM_Tuner.tuner_config_ext.cTuner_Charge_Pump= 0;

    //ptrQAM_Tuner.tuner_config_ext.Tuner_Read			= i2c_read;
    //ptrQAM_Tuner.tuner_config_ext.Tuner_Write			= i2c_write;

    extern INT32 tun_alpstdae_init(UINT32 *tuner_id, struct QAM_TUNER_CONFIG_EXT *ptrTuner_Config);
    extern INT32 tun_alpstdae_control(UINT32 tuner_id, UINT32 freq, UINT32 sym, UINT8 AGC_Time_Const, UINT8 _i2c_cmd);
    extern INT32 tun_alpstdae_status(UINT32 tuner_id, UINT8 *lock);
    c_tuner->nim_Tuner_Init = tun_alpstdae_init;
    c_tuner->nim_Tuner_Control = tun_alpstdae_control;
    c_tuner->nim_Tuner_Status = tun_alpstdae_status;	
    c_tuner->tuner_config_ext.i2c_type_id = bI2cType;

    /*config tuner S3202 END ************************************************************************/
#endif
#endif
	
    return cfg;
}
#endif
struct scart_init_param scart_param =
{
 	I2C_TYPE_SCB1,          //UINT32 i2c_type_id;
	0,                      //UINT32 vcr_plug_pos;
	(UINT32)NULL,           //UINT32 vcr_callback;
	0,                      //UINT16 scart_volume; 	/*0~7.  =0: Mute; =1: -6dB; =2: -3dB; =3: 0dB, =4: 3dB; =5: 6dB; =6: 9dB; =7: 12dB*/
	0x94,                   //reserved3
};


SciCfg sci_config[] =
{
    {SCI_FOR_RS232, 115200, SCI_PARITY_EVEN},
    {SCI_FOR_MDM, 115200, SCI_PARITY_EVEN},
};

I2cCfg i2c_config[6] =
{
    {I2C_TYPE_SCB0, 100000, 1, NULL, NULL},
    {I2C_TYPE_SCB1, 100000, 1, NULL, NULL},  
    //{I2C_TYPE_SCB2, 0, 0, NULL, NULL},     
    {I2C_TYPE_GPIO0, 40000, 1, &gpio_array[GPIO_I2C0_SDA_INDEX], &gpio_array[GPIO_I2C0_SCL_INDEX]},  
    {I2C_TYPE_GPIO1, 100000, 1, &gpio_array[GPIO_I2C0_SDA_INDEX], &gpio_array[GPIO_I2C0_SCL_INDEX]},          
    {I2C_TYPE_GPIO2, 100000, 1, &gpio_array[GPIO_I2C0_SDA2_INDEX], &gpio_array[GPIO_I2C0_SCL2_INDEX]},
};

//#define SYS_I2C_SDA2 64
//#define SYS_I2C_SCL2 65

 
BoardCfg* advance_cfg(BoardCfg* cfg)
{
    if(NULL == cfg)
        return NULL;    

    cfg->chip_param.mem_gpio_enabled = TRUE;

    cfg->chip_param.ci_power_ctl_enabled = TRUE;
#if (SYS_NETWORK_MODULE == NET_ALIETHMAC)	    
    cfg->chip_param.ali_ethmac_enabled = TRUE;
#endif
#ifdef DUAL_ENABLE    
    cfg->chip_param.dual_enabled = TRUE;
#endif

#if(defined SHOW_ALI_DEMO_ON_SCREEN)
    cfg->adv_cfg_para.hdcp_disable = TRUE;
#else
    cfg->adv_cfg_para.hdcp_disable = FALSE;
#endif

    cfg->adv_cfg_para.i2c_for_eddc = I2C_TYPE_GPIO1;
    cfg->adv_cfg_para.hdmi_cm_scl = SYS_I2C_SCL2;
    cfg->adv_cfg_para.hdmi_cm_sda = SYS_I2C_SDA2;
#ifdef AUDIO_DESCRIPTION_SUPPORT    
    cfg->adv_cfg_para.audio_description_support = TRUE;
#else
    cfg->adv_cfg_para.audio_description_support = FALSE;
#endif
    cfg->adv_cfg_para.sys_mute_gpio = gpio_array[SYS_MUTE_INDEX].position;
    cfg->adv_cfg_para.ext_mute_mode = MUTE_BY_GPIO;
    cfg->adv_cfg_para.sys_mute_polar = gpio_array[SYS_MUTE_INDEX].polar;
    cfg->adv_cfg_para.snd_output_chip_type =  1;

#ifdef HD_SUBTITLE_SUPPORT    
    cfg->adv_cfg_para.hd_subtitle_support = TRUE;
#else
    cfg->adv_cfg_para.hd_subtitle_support = FALSE;
#endif

#ifdef TVE_USE_FULL_CURRENT_MODE
    cfg->adv_cfg_para.tve_full_current_mode = TRUE;
#else
    cfg->adv_cfg_para.tve_full_current_mode = FALSE;
#endif    

    cfg->adv_cfg_para.tve_tbl = tve_table_total;
#if defined(DUAL_VIDEO_OUTPUT_USE_VCAP)    
    cfg->adv_cfg_para.tve_adjust = g_sd_tve_adjust_table;
#endif

#ifdef SUPPORT_PACKET_26
    cfg->adv_cfg_para.ttx_packet_26_support = TRUE;
#else
    cfg->adv_cfg_para.ttx_packet_26_support = FALSE;
#endif
#ifdef TTX_SUB_PAGE
    cfg->adv_cfg_para.ttx_sub_page = TRUE;
#else
    cfg->adv_cfg_para.ttx_sub_page = FALSE;
#endif

#ifdef MULTI_CAS   
    cfg->adv_cfg_para.cas_type = CAS_TYPE;

#ifdef SUPPORT_CAS9
    cfg->adv_cfg_para.cas9_support = TRUE;
#else
    cfg->adv_cfg_para.cas9_support = FALSE;
#endif
    cfg->adv_cfg_para.invert_detect  = 0;
#endif

#ifdef SUPPORT_AFD_SCALE
    cfg->adv_cfg_para.afd_scale_support = TRUE;
#else
    cfg->adv_cfg_para.afd_scale_support = FALSE;
#endif

#ifdef H264_SUPPORT_MULTI_BANK
    cfg->adv_cfg_para.h264_support_mulit_bank = TRUE;
#else
    cfg->adv_cfg_para.h264_support_mulit_bank = FALSE;
#endif
#ifdef CHANCHG_VIDEOTYPE_SUPPORT
    cfg->adv_cfg_para.chanchg_video_type_support = TRUE;
#else
    cfg->adv_cfg_para.chanchg_video_type_support = FALSE;
#endif
#ifdef AVC_SUPPORT_UNIFY_MEM
    cfg->adv_cfg_para.avc_unify_mem_support = TRUE;
#else
    cfg->adv_cfg_para.avc_unify_mem_support = FALSE;
#endif
    cfg->adv_cfg_para.ce_api_enabled = TRUE;
   return cfg;
}

extern INT32 scart_mx9671_attach(struct scart_init_param * param);
extern void pan_ch455_id_set(struct pan_device *dev, UINT32 id);
extern INT32 pan_ch455_attach(struct pan_configuration *config);
BoardCfg* get_board_config(void)
{
    UINT8 i;
    UINT32  tuner_config;
    MEMSET(&board_config, 0, sizeof(BoardCfg));
    board_config.pin_mux_count          = ARRAY_SIZE(pin_mux_array);
    board_config.all_gpio_count         = ARRAY_SIZE(gpio_array);
    board_config.mem_gpio_enabled       = MEM_GPIO_ENABLED;
    board_config.pin_mux_array          = pin_mux_array;
    board_config.all_gpio_array         = gpio_array;

    board_config.ddr_power_ctl          = NULL;
    board_config.sys_power              = &gpio_array[SYS_POWER_INDEX];
    board_config.mute                   = &gpio_array[SYS_MUTE_INDEX];        
    board_config.usb_power              = NULL;
    board_config.fp_standby             = NULL;
    board_config.scart_tvsat_switch     = NULL;
    board_config.scart_aspect           = NULL;
    board_config.scart_tv_fb            = NULL;   
    board_config.scart_power            = NULL;
    board_config.scart_vcr_switch       = NULL;
    board_config.scart_vcr_detech       = NULL;
    board_config.smc_5v_ctl             = NULL;
    board_config.ata2lan_cs             = NULL;
#ifdef SDIO_SUPPORT    
    board_config.sdio_detect            = &gpio_array[SDIO_GPIO_DETECT_INDEX];
    board_config.sdio_lock              = &gpio_array[SDIO_GPIO_LOCK_INDEX];
    board_config.sdio_cs                = &gpio_array[SDIO_GPIO_CS_INDEX];
#endif

/*
#ifdef DVBS_SUPPORT
    board_config.front_end_cfg[0] = front_end_s_cfg(0);
#endif
#ifdef ISDBT_SUPPORT
    board_config.front_end_cfg[1] = front_end_isdbt_cfg(1);
#endif
#ifdef DVBT_SUPPORT
    board_config.front_end_cfg[1] = front_end_t_cfg(1);
#endif
*/
    board_nim_config(&board_config,get_support_2tuner_type());
    board_config.libc_printf_uart_id = SCI_FOR_RS232;
    board_config.sci_config[0] = &sci_config[0];
#ifndef DUAL_ENABLE    
    board_config.sci_config[1] = &sci_config[1];
#endif    
    for(i=0;i<6;i++)
    {
        board_config.i2c_config[i] = &i2c_config[i];
    }
    board_config.i2c_gpio_num = 3;  //2;
    board_config.i2c_scb_num = 2;   //3;
#ifdef SYS_BOARD_IS_M3606_01V04
    board_config.scart_param = NULL;
    board_config.scart_attach = NULL;
#else
    board_config.scart_param = &scart_param;
    board_config.scart_attach = scart_mx9671_attach;
#endif    
    board_config.pan_config = &pan_config;
    board_config.pan_i2c_id_set = pan_ch455_id_set;
    board_config.pan_i2c_id = I2C_TYPE_SCB1;
    board_config.pan_attach = pan_ch455_attach;
   
    board_config.flash_type = 0;//serial nor flash
	
	
    board_config.rfm_attach = NULL;
    board_config.rfm_i2c_id = I2C_TYPE_SCB1;

    board_config.key_map = g_itou_key_tab;
    board_config.ir_key_maps = ir_key_maps;
    board_config.key_map_cnt = sizeof(g_itou_key_tab)/(sizeof(struct ir_key_map_t));
    board_ddr_priority_init();
    return advance_cfg(&board_config);    
}

/**/
/*
flag                   |        |                |        |   
            reserve    | 7    6 |  5          4  | 3    2 | 1     0
                       |C_2  C_1|ISDB-T2  ISDB-T2| t_2 t_1| s_2   s_1                 
*/
/**/

UINT32 get_support_2tuner_type(void)
{
    UINT32  tuner_flag = 0;
    UINT32  define_flag = 0;
    UINT32  two_tuner = 0;
    INT8   s_define = 0,isdbt_define = 0,t_define = 0,c_define = 0,shift_offset;
    
#ifdef DVBS_SUPPORT
    s_define = 1;
#endif

#ifdef DVBT_SUPPORT
    t_define = 1;
#endif

#ifdef ISDBT_SUPPORT
    isdbt_define = 1;
#endif

#ifdef DVBC_SUPPORT
    c_define = 1;
#endif

#ifdef SUPPORT_TWO_TUNER
    two_tuner = 1;
#endif
    
    if(((s_define + t_define + isdbt_define + c_define) > 0) && ((s_define + t_define + isdbt_define + c_define) < 3))
    {
        if(s_define + t_define + isdbt_define + c_define < 2)  //4only single tuner
        {
            if(s_define == 1)
            {
                shift_offset = 0;
                tuner_flag |= s_define << shift_offset;
            }
            else if(t_define == 1)
            {
                shift_offset = 2;
                tuner_flag |= t_define<<2;                
            }
            else if(isdbt_define == 1)
            {
                shift_offset = 4;
                tuner_flag |= isdbt_define<<shift_offset;
            }
            else if(c_define == 1)
            {
                shift_offset = 6;
                tuner_flag |= c_define<<shift_offset;
            }
            else
            {
                SDBBP();//4macro define error.
            }
            if(two_tuner == 1)
                tuner_flag |= (s_define + t_define + isdbt_define + c_define)<<(shift_offset+1);
            
        }
        else  
        {
            if(two_tuner == 0)
            {
                SDBBP();//4macro define error.   
            }
            else
            {
                if(s_define == 1)
                {
                    shift_offset = 0;
                    tuner_flag |= s_define << shift_offset;                    
                }
                if(t_define == 1)
                {
                    shift_offset = 2;
                    tuner_flag |= t_define << shift_offset;                    
                }
                if(isdbt_define == 1)
                {
                    shift_offset = 4;
                    tuner_flag |= isdbt_define << shift_offset;                        
                }
                if(c_define == 1)
                {
                    shift_offset = 6;
                    tuner_flag |= c_define << shift_offset;                     
                }
            }
        }
    }
    else
    {
        SDBBP();
    }
    return tuner_flag;
}


void board_nim_config(BoardCfg *cfg,UINT32 nim_flag)
{
    INT i;
    INT8 nim_cnt = 0;

    for(i = 0; i < 8; i++)
    {
        if(nim_flag &(1<<i))
        {
            if(i < 2)
            {
#ifdef DVBS_SUPPORT
                cfg->front_end_cfg[nim_cnt] = front_end_s_cfg(nim_cnt);
#endif
            }
            else if(i < 4)
            {
#ifdef DVBT_SUPPORT                
                cfg->front_end_cfg[nim_cnt] = front_end_t_cfg(nim_cnt);
#endif
            }
            else if(i < 6)
            {
#ifdef ISDBT_SUPPORT                
                cfg->front_end_cfg[nim_cnt] = front_end_isdbt_cfg(nim_cnt);
#endif
            }
            else
            {
#ifdef DVBC_SUPPORT                 
                //add on 2011-11-04 
                cfg->front_end_cfg[nim_cnt] = front_end_c_cfg(nim_cnt);
#endif                
            }
            nim_cnt++;
            
        }
    }
    
}

